As the processing power of 3U cPCI SBCs continues to increase, expanding system functionality by means of PCI Mezzanine Cards (PMCs) is frequently the method of choice for maximizing performance while minimizing system size, power consumption, and cost.
In order to increase package density, Aitech has developed the CM951 PMC Carrier with onboard 1553 interface and TTL I/Os in addition to hosting a PMC like in the Aitech CM950 Carrier. When used in conjunction with our PowerPC® SBCs that provide cPCI backplane interface, such as Aitech's S950, the CM951 adds an additional PMC site per backplane slot. Depending on the SBC, up to seven CM951s can be used in an eight-slot 3U cPCI Enclosure with a S950 SBC configures as a system controller. CM951 architecture is based on a PCI-PCI bridge implemented in a pair of anti-fuse FPGAs. The bridge connects the primary 32-bit 33.333 MHz PCI expansion bus to a secondary 32-bit 33.333 MHz PCI bus on which the PMC site reside. All cPCI interrupts are routed from the PMC site directly to the cPCI backplane bus interface. Both engineering model and flight model are designed in conduction-cooled form factor to host a conduction-cooled PMC such as the Aitech the S710 Communication and 1394a PMC. All I/Os are routed to the cPCI backplane per “PMC on CompactPCI” PIGMG 2.3, R1.0 specifications (dated August 7, 1998).
Designed for harsh space environment applications, the CM951 flight model has an unshielded total dose capability of 45 krad (Si) and an optional 100 krad version can be available upon request. With it's extremely low power consumption (7W maximum – 6.5W on 5Vdc and 0.5W on 3.3Vdc), the CM951 provides maximum expansion capabilities while consuming minimum resources. In addition to +5Vdc and +3.3Vdc, +12Vdc and -12Vdc are routed from cPCI P1 connector Pin D1 and Pin B1 to the PMC connectors J12-Pin1 and J11-Pin2 respectively.