MEN Mikro A602

Specification

CPU:

3x PowerPC® 750 GL

• Scalable performance
• Up to 900MHz processor core frequency
• Superscalar
• Classic PowerPC® FPU, MMU
• CPU bus to FPGA: 100-MHz/64-bit

Lock-step operation

• All CPUs do the same thing at the same time
• 2-out-of-3 voting in FPGA with CPU bus clock speed (100MHz)
• Software-assisted resynchronization
• No functional interruption in case of an SEU inside the CPU

Chipset

• North- and Southbridge realized in FPGA

Memory:

2x 32 kB L1 cache, 1MB L2 cache integrated in each CPU
3 independent ranks of 512MB DDR SDRAM system memory, FPGA-controlled

• 100MHz memory bus frequency (32 bit)
• Up to 800 MB/s
• 2-out-of-3 voting in FPGA
• Scrubbing to prevent accumulation of SEU
• No functional interruption in case of an SEU inside the memory

2 independent ranks of 256MB Flash, FPGA-controlled

• Primary and backup Flash ranks contain the same data, auto-selection by boot loader
• ECC protection

1MB FRAM, ECC protection
4KB serial EEPROM for production data (serial number etc.)

I/O:

All I/O realized in FPGA and available at rear I/O
Sextuple UART

• E.g., for communication with other A602
• o Data rates up to 460,800 Baud for each channel
• Handshake lines: none

RS232 UART

• Also available at front panel
• Data rates up to 460,800 Baud
• 2x 256 Byte transmit/receive buffer
• Handshake lines: none

I²C bus

Mezzanine Slots:

Two PMC slots

• 32 bit/33 MHz, 3.3V V(I/O)
• PMC1 with front and rear I/O
• PMC2 customized for AFDX® PMC with rear I/O only

Miscellaneous:

Voltage monitoring
Temperature monitoring
Watchdog
Reset signal control
Control of redundant power supplies
Sleep mode

• Lowers power consumption in case of primary power supply interruption
• Power failure indicated through signals from backplane
• Supports power interruptions specified in Airbus directive ABD0100.1.9
• CPUs and memory can be put into sleep mode

Redundant clock generation
Connection with second A602 possible (with special backplane)

• Control of shared outputs
• Exchange of state information
• BMC and 6x UART link

Local PCI Bus:

32-bit/33-MHz, 3.3V V(I/O)
Compliant with PCI Specification 2.2

VMEbus:

Tundra TSI148 controller
Compliant with VME64, VME64 and 2eSST specification
Slot-1 function with auto-detection
Master

• D08(EO):D16:D32:D64:A16:A24:A32:ADO:BLT:RMW

1MB shared fast SRAM
Mailbox functionality
Single level 3 fair requester
Single level 3 arbiter
Bus timer
Location Monitor
Performance

• Coupled read/write D32 non-block transfer rate 6.5 MB/s

Electrical:

Supply voltage/power consumption:

• +5V (-3%/+5%), tbd.
• +3.3V (-5%/+5%) optional, tbd.

Mechanical:

Dimensions: standard double Eurocard, 233.3mm x 160mm
Weight (without mezzanines and accessories): tbd.

Environmental:

Temperature range (operation): -40°C to +50°C (qualified components)
Temperature range (storage): -40°C to +85°C
Relative humidity (operation): max. 95% non-condensing
Relative humidity (storage): max. 95% non-condensing
Altitude: -300m to +20,000m
Shock: 15g/11ms
Bump: 10g/16ms
Vibration (sinusoidal): 1g/10..150Hz
Conformal coating on request
All components soldered

MTBF:

tbd. @ 40°C according to MIL.HDBK-217FN2 with modifications.

Safety:

Erroneous behavior of CPU/memory subsystem < 1E-8 / h

• Considering hardware failures and worst-case SEU environment

PCB manufactured with a flammability rating of 94V-0 by UL recognized manufacturers

EMC:

Conforming to EN 55022 (radio disturbance), EN 55024 / EN 61000-4-2 (electrostatic discharge immunity) and EN 55024 / EN 61000-4-3 (electromagnetic field immunity)

BIOS:

MENMON™

Software Support:

VxWorks®, VxWorks®/Cert
PikeOS

ROHS Status:

This product is lead free/ROHS compliant.